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| Jaya Madan |
| CUIET – ECE |
| https://www.linkedin.com/in/jaya-madan-6024829b |
| Research Gate Profile page : https://www.researchgate.net/profile/Jaya_Madan |
| TCAD simulations of semiconductor devices |
Publications
| Title of the Research Paper : Numerical Simulation of N+ Source Pocket PIN-GAA-Tunnel FET: Impact of Interface Trap Charges and Temperature |
| Journal Name : IEEE Transactions on Electron Devices |
| H Index : 165 |
| Download : https://www.chitkara.edu.in/global-week/faculty-data/ece/jaya-Madan/PJTED.pdf |
| Title of the Research Paper : RTemperature Associated Reliability Issues of Heterogeneous Gate Dielectric – Gate All Around – Tunnel FET |
| Journal Name :IEEE Transactions on Nanotechnology |
| H Index : 73 |
| Download : https://www.chitkara.edu.in/global-week/faculty-data/ece/jaya-Madan/PJ-IEEE-TNANO.pdf |
| Title of the Research Paper : Device simulation of 17.3% efficient lead-free all-perovskite tandem solar cell |
| Journal Name : Solar Energy, Elsevier |
| H Index : 151 |
| Download : https://www.chitkara.edu.in/global-week/faculty-data/ece/jaya-Madan/Solar-energy.pdf |